Common Circuit Design Flaws That Cause Operational Problems (problems fixed long ago are still showing up in designs)
Figure 1. Circuit Board With Common Design Flaw
Discussion: In my consulting work, I see a lot of operational problems in systems that are caused by common circuit design flaws. In this Technical Tidbit, several of these flaws are discussed and examples are shown. A thread that runs through many of these examples, and my consulting work, are problems caused by attempting to separate “grounds” into different regions with “single point” connections between them. An example might be to separate a printed wiring board, PWB, ground plane into analog and digital areas.There are a few relatively rare cases where grounds must be split apart, but when this is done a great deal of care must be taken to avoid problems. In most cases I have seen, separating grounds caused operational problems in a system. Grounds should be separated only if absolutely necessary and with concrete evidence (preferably based upon measurements) that doing so is required. Application notes in device manuals sometimes give incorrect advice on this topic.
So, let’s start with my favorite problem, ground plane breaks on a PWB.
1. Ground plane breaks: Figure 1 above shows a small section of a PWB with a light shining through the board so breaks in the power/ground planes can be easily seen. Notice paths crossing a break in the power/ground planes at random. There are many effects of doing this covered in the linked articles at the bottom of this page. The situation is illustrated in Figure 2.
Figure 2 shows a layout diagram of a small test board, about 10 cm by 15 cm, that is used in a number of my Technical Tidbits. The bottom signal path is over a continuous ground plane whereas the top path crosses a 5 cm slot in the solid copper planes. The board has two planes with an identical break in each. The plane on the back side of the board is not used but is shorted to the top plane by the BNC connectors on the left end of each path.All signals form a loop, from source to load and back again and it is the “back again” that often leads to problems. In this case, the returning current for the bottom path forms a long (the length of the signal path) but very thin loop, just a few mils in height. However, for the upper path, the returning current to the source must pass around the end of the slot in the ground plane and in doing so forms a substantial loop. The many bad effects of this loop are described in the Technical Tidbits linked at the bottom of the page and include slowed risetime, increased crosstalk to other paths, EMI emissions, and susceptibility to ESD and radiated RF fields. Figures 3 and 4 show two more examples of paths crossing plane breaks that cut all the way through the board. It is amazing to me that such features still show up in board designs today.
In Figure 4 there are two interesting features. The smaller one is the vertical field of vias near the lower right corner of the picture. The cutouts in the power and ground planes for these vias are large enough to overlap and form a slot in the planes. If there was enough room to get the horizontal signals in-between the vias, then there is a good chance that paths could also pass between the vias on the power and ground layers to slice up the slot into smaller pieces. Although I can’t tell if this was done on this board, I doubt those paths were added.
The larger feature to note in Figure 4 is the horizontal slot between the digital and analog areas of the board (complete with a few signals paths in the break!). The designers thought the break was necessary to avoid digital noise getting into sensitive small signal analog circuits. Needless to say this board had a lot of problems including excessive emissions. When all plane breaks were filled in, the board worked perfectly (no analog problems) and emissions were reduced.
2. Single point grounding of printed wiring boards: This feature of system design is more common than I would expect and often causes operational problems. Figure 5 shows a board from an old disk drive mounted on a copper clad board for test purposes. The results of injecting ESD at the lower left are described in my May 2002 Technical Tidbit and they are not what many engineers expect. Single point grounding of the board (the upper right connection was used in the test) resulted in a lot of current ringing at about 200 MHz due to the ESD hit. The board and copper plane formed a nice parallel plate capacitor and with the single connection point inductance formed a high Q tuned circuit at 200 MHz, not a desirable thing to do. Adding the other three connections to the copper plane raised the resonant frequency to about 500 MHz and the upper right corner connection became very quiet compared to the case where it was the only connection.
3. Processor reset lead routing:This one occurs too often for comfort. I have seen processor reset leads routed all over a processor board, bad enough in itself, and then extended to a noisy I/O board as well! Recently, I worked on a case where a 10 cm reset trace on a four layer board caused the circuit to reset in response to an ESD event across the room. The fix was to filter the reset with an RC filter near the processor. Remember, when it comes to ESD, lead lengths of one cm can be too long, for example in the RC filter example.